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Simple DSP-based digital frequency meter

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* This works for the 2008 Texas Instruments (TI) C2000 dsp Group Grand Prix proposition first prize and received Hefei University of Technology in 2008 students innovative experiment project funding

Works of significance and profile

Microelectronics and computer technology along with the rapid development of a variety of electronic measuring instruments in principle, functions, accuracy and level of automation and so on have undergone tremendous changes, especially after the birth of DSP technology, electronic measurement technology is also entered into a new era. In recent years, DSP has become the basis for a variety of electronic devices devices, has become the most development potential in the 21st century-oriented sectors, and even known as the information revolution standard-bearer of the digital age. In the electronic measurement technology, the frequency is the most basic one of the parameters, it is with a number of electrical parameters and non-power measurements all have a very close relationship. For example, many sensor is to convert some non-power frequency measurement, so the frequency of measurement becomes more important. Digital frequency meter is used to display the measured signal frequency digital instruments, the measured signal can be sine, square, or other cyclical changes in the signal.

Digital frequency meter widely used in high-speed integrated circuits and large-scale integrated circuits, makes the equipment smaller and less power, precision, and reliability. The traditional frequency counter measurement error large, narrow scope, so gradually a new type of digital frequency meter replaced. DSP-based and other precision frequency counter with its measuring accuracy, high precision, convenient, cheap and other advantages will be widely used.

We designed a simple digital frequency meter without the use of any door controller parts under the control, in a very wide range to achieve an equal precision frequency measurement, 0.5Hz ~ 10MHz square wave within the framework of the maximum relative error of measurement is less than 2e - 6, measuring the maximum relative error of sine wave is less than 3.5e-5; results displayed on the computer through the RS232 communications, you can easily monitoring data.

Design

Overview

Traditional and other precision frequency measurement method using the gate controller pieces generated gating signals in order to achieve the actual gates signal and measured signal synchronization, the elimination of the measured signal generated by a pulse counting error, its schematic diagram shown in Figure 1.

Simple DSP-based digital frequency meter

Figure 1 Traditional and other precision measuring principle

Count from the hardware control gates of time, when the preset they signal (ie fixed gate signal) is high, the reference signal counters CNT1 and CNT2 the measured signal the counter is not started, but the other went to the measured signal's rising edge start counting until the same time; when the preset signal is low when you have two counters are not immediately shut down, the same rising edge to have to wait until after the closure of the measured signal; As a result, the actual gate signal cycle time is measured integer times, in order to achieve the gate and the measured signal synchronization. However, the actual gates time is not fixed, and measured the frequency signal. In addition, whether it is counter or microcontroller, such as precision measurement in the realization of the door is always inseparable from the controller parts.

The design is based on DSP-rich software resources, through judgments and treatment, completed the measured precision of measurements such as signal frequency. Hardware without any door controller parts, simplifying the circuit. system block diagram shown in Figure 2, signal processing section for TMS320F2812 DSP chip as the control and measurement of the core; signal conditioning component is to complete the signal amplification, shaping and limiting; standard frequency signal generated by a 30MHz crystal oscillator active, as High-frequency standard filling pulse; through the DSP-SCI module and host computer for communication, results are displayed in the upper machine.

Simple DSP-based digital frequency meter

Figure 2 System Block Diagram

Frequency / Period Measurement

In the measured signal frequency and the cycle of measurement, such as precision measurement is based on the DSP-match T1PWM pin output level signal transitions as gates open and close, due to compare match occurred in the measured signal's rising edge in order to achieve the gates of time and measured the signal synchronization. Schematic diagram shown in Figure 3.

Simple DSP-based digital frequency meter

Figure 3 Principle of Equal Precision Frequency Measurement

General-Purpose Timer T1 External clock input selection timer clock, where the measured signal with the conditioning after the timer T1, as the clock input, the timer T2 internal CPU clock clock input selection is used to generate high-frequency standard filling pulse. F2812-chip EVA in the event of Universal Timer T1 compare match event, its comparative output pins T1CMP output signal will automatically change the state level to generate PWM wave. CAP1 is set to rising edge capture unit to capture, T1PWM rising edge of the output PWM waves are CAP1 captured and read at this time of the timer T2 counts, empathy again when the next compare match timer T2 to read the count value. T2CNT values through two-phase reduction, you can get the gates of time standards for the number of filling pulses, and then find the measured signal frequency.

Based on DSP-match T1PWM pin output level signal transitions as gates open and close, due to compare match occurred in the measured signal's rising edge, thus realizing the gates of time and measured the signal synchronization. Comparison of matching two adjacent waves generated by the rising edge of PWM signals respectively as the gates open and close signals, which measured the number of signals as an integer, and is arbitrarily set by us. Clock Timer T2 internal CPU clock input selection is used to generate the standard filling pulse. Set Capture Unit CAP1 for the rising edge capture, capture rising edge when it is read when the value of the stack CAPFIFO within the next captured again when the value of the stack to calculate the standard number of filling pulses Ny, guaranteed Ny's number of not less than a certain value, you can ensure the gates of time greater than a certain value. Suppose now wish to fill a high-frequency pulse gates of time not less than the total number of n, when Ny> n, when, it increases the timing cycle of timer T1, the T1 cycle of the timer registers TIPR increased value. There is the formula T1PR +1 = n / Ny, due to n / Ny is not necessarily an integer, false a <n / Ny <a +1 (a is an integer), then take n / Ny = a +1, manifested in the measured signal on, then with the traditional hardware control using the same, with the next rising edge of the measured signal as the signal gates off the signal, only the rising edge occurs at the next compare match. Then, at the gates of time to read the number of high-frequency filling pulse, there are Ny ≥ n, so as to arrive precision measured signal frequency. In this design, the timer T1 is not closed gates of time before the closure of a signal at the same time as the next signal to open gates the signal.

Period measurement and frequency measurement of the basic principles are identical, measure signal frequency, according to the public and T = 1 / f can come to the measured signal cycle.

Error Analysis

T1 timer count start-stop times are triggered by the signal's rising edge, in a measurement time counting signals measured within the error-free; at this time, count the number of standard-frequency pulse Ny, up to a difference of one pulse Therefore, the theory error as follows:

| d | ≤ 1/Ny

Clearly, the measurement accuracy is only concerned with the Ny, as long as the value of Ny is large enough, we can guarantee accuracy.

Hardware Design

As shown in Figure 4, the signal will be measured through high-speed op amp OPA2690 zoom, after a high-speed comparator TL3016 for plastic surgery [3], because the comparator in the low-frequency sine-wave signal shaping, the output waveform of the edge of a more serious jitter affecting the measurement. The solution is to join the comparator positive feedback to accelerate the signal edge, while the formation of hysteresis, which can effectively eliminate jitter. After shaping the signal through the Schmitt trigger SN74LVC1G14 for high-speed limiter and further shaping. Measurement of some of the major use of DSP2812 chip timer T1 of the clock input pin TCLKINA, Timer T1 Comparison of output pins T1PWM and capture input pins CAP1 unit CAP1, to complete the frequency measurement. Communication section, select MAX3221 as the RS-232 level-shifting device, through the 9-pin standard RS-232 mouth and upper machine serial communication. Mainly used to send the DSP's serial communication and serial communication pins SCIRXD receive pins SCITXD.

Simple DSP-based digital frequency meter

Figure 4 hardware circuit connection diagram

Software Design

Some of the major software design includes the following four parts:

· Initialization: For variable parameters, the system clock, PIE, EV, Flash, GPIO, etc. configuration.

· Interrupt module: SCI interrupt and timer T2, T3 overflow interrupt.

· Data processing module: sub-+ to take the arithmetic mean.

· Output operations modules: data transmission via RS-232 host computer.

Figure 5 is the measured frequency, cycle, software flow chart, Figure 6 for the Timer 2 overflow interrupt flowchart.

Simple DSP-based digital frequency meter

Figure 5 measuring frequency, period flow

Simple DSP-based digital frequency meter

Figure 6 Timer T2 overflow interrupt flowchart

In that part of the initialization to configure the following: general-purpose timers T1 as an external timer clock input clock, the clock input for general-purpose timers T2 internal clock input, used to the standard pulse counting, the standard pulse from an external 30MHz The active crystal available; Capture Unit 1 is set to capture rising edge is used to capture the output PWM wave T1PWM pin rising edge, read on each compare match timer T2 counts of T2CNT, the value stored in CAP1FIFO inside. Initialization unit to capture the state of a register of the FIFO stack status is set to an empty stack; to the timing cycle of timer T1 is set to 4 the measured signal cycle length, measured by a timer T1 of the timing cycle, the number of pulses within the standard to calculate the measured signal frequency, and then measured the signal section, namely, low frequency (less than 46.875Hz), the band (more than 46.875Hz, less than 2343.75KHz), and high band (more than 2343.75 KHz), which is based on sub-saturation value of the timer count 65536 and counting the number should be greater than equal to 1. If the signal frequency for the high frequency band is to re-configure the timer T1, the timer registers T2, to change the timing cycle, as well as the time gates within each high-frequency fill the number of pulses. In the timer T1 timing cycle, the next one to calculate the frequency and periodicity. In addition, the number of timer T2 overflow in the first compare match occurs when cleared, but whether it is the first compare match occurrence is by setting a flag to determine. When the spill is cleared only after the number of recorded spill frequency, until the second compare match occurs.

The next step of improvements

The method of measurement error mainly comes from the hardware part of shaping the merits of the circuit is directly related to the level of measurement accuracy. So, our next task is to improve the effectiveness and shaping plastic anti-jamming circuit performance, reduce the maximum extent possible, the error caused by the signal shaping.

As the DSP timer counts the count, when there is saturation, therefore the precision of measurement in the realization of the existence ceiling, that is, when the measured signal frequency is higher than the frequency of high-frequency filling pulse, the method can not be achieved accuracy of such. Can be conducted on the basis of the program the following address: Select the timer T1 timing cycle, the number of measured signals is fixed, can be set T1PR to 65529, while the clock timer T2 was revised to 75MHz, this way we can ensure that each gate Gate time, the number of high-frequency filling pulse, resulting in pairs of high-frequency signal of frequency and periodicity of the measurement to ensure the precision.

But chose timer T1 clock input when an external clock signal input range of the measured there are limits, if you want to further improve the measurement range of the signal, making the range up to hundreds of megabytes, or G Hz can be considered phase measurement method, the measured signal set to 360 degrees, according to the measured signal and the standard X-degree phase difference between signals to calculate the measured signal frequency.


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