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EDA/PLD Articles


121: PSD813F2 configuration in the FPGA application
With the extensive application of single chip, continuously improve the performance, integration is also increasing. However, the traditional single-chip system design will need many of the separation device (such as the address latch, decoder, RAM,...

122: FPGA-based nuclear physics experiments Scaler Design and Implementation
University of calibration experiments in a very wide range of applications, including modern physics experiment in nuclear physics experiments has two experimental (GM counter and β absorption) used in high voltage power supply and scaler, and the ...

123: Verilog-HDL based on the bearing vibration noise voltage peak detector
Introduction Production industry in the bearings, bearing vibration noise of the peak detector is an important indicator. The past, the testing are using the traditional method of analog circuits, it is difficult to achieve and maintain 1:1 capture...

124: I2C device interface IP core CPLD design
Due to the structure of CPLD-based digital design trends, will appear at different levels for the CPLD of IP (Intellectual Property) core. Approved by all IP reuse can greatly enhance the design capability and efficiency. Major foreign companies hav...

125: VHDL high-speed image acquisition system design
Modernization of production and scientific research on the image acquisition system requirements increase. Traditional frame grabbers slow processing simply can not be well positioned to meet the special requirements, so we built a high-speed image ...

126: APON in the 155Mb / s burst mode transceiver module design and testing
In recent years, the burst-mode data transmission is increasingly being used in digital communication systems. These systems through fiber-optic, wireless and coaxial cable and other media to achieve point-to-multipoint connection, with ATM-based Pa...

127: And application of a new generation of CPLD
In recent years, with chip manufacturing technology, programmable logic device (PLD) in the speed and integration has been both to increase rapidly. Because of its low power consumption, small size, integrated high-speed, short development cycle, lo...

128: Range of 12 automatically converted decimal precision digital frequency meter, etc.
1 Introduction VHDL is a fast circuit design tools, has now become an IEEE industry standard hardware description language. Compared to traditional methods of circuit design, VHDL has a multi-level functional description of system hardware, and sup...

129: FPGA realization of the use of video and image processing design
Video and image processing development trends Video and image processing at the core, such as HDTV and digital cinema technology innovation and progress very rapidly, and its driving force is the image acquisition and display resolution, advanced v...

130: FPGA-based FFT processor design
1 Introduction With the rapid development of digital technology, Digital Signal Processing has been deep into the various subject areas. In digital signal processing, many algorithms such as correlation, filtering, spectral estimation, convolution ...

131: Using FPGA to achieve the RC6 algorithm
Introduction RC6 as the AES (Advanced Encryption Standard) algorithm for the candidate submitted to NIST (U.S. National Bureau of Standards), a new block cipher. It is based on the RC5-designed to better meet the requirements of AES, and increased ...

132: DDS-based Arbitrary Waveform Generator technology research and design
1 DDS Overview The basic principles of 1.1 DDS Direct Digital Synthesis (Direet Digital Synthesis, referred to as DDS) is built on the basis of the sampling theorem, first of all need to have a sample of the waveform will be digitized samples into...

133: Virtex a ASlC the 5LXl10 design prototype development platform
Introduction At present, ASIC design is increasing the size, complexity is increasing at the same time, increasing competition makes the market in today's electronic products enter the market of products is extremely sensitive time. How to impr...

134: FPGA board and the GPS-OEM serial communication system design
0 Introduction Global Positioning System (Global Positioning System referred to as GPS) is the second-generation satellite navigation system. It is in the TRANSIT satellite navigation system developed on the basis of the, GPS can provide all-weathe...

135: On how to achieve eASIC return value ASIC
Preface In the market driven by demand, in order to increase speed and reduce power consumption, reduce costs, and semiconductor process followed Moore's Law has entered the era of deep sub-micron DSM. From 180nm, 130nm, 90nm, 65nm, and then do...

136: Application in tumor therapy system design graphics mode
Challenge In the strict framework of rules and regulations to keep the design process, through FDA certification level II medical device design, prototype development and launch user interface and control system for a more relaxed process almost pa...

137: VHDL code control system design and simulation
1 Introduction As electronic technology and ASIC technology. Digital system design to the speed and huge capacity, small size, light weight trends. At present, the design of digital systems can be directly user-oriented needs of the system and func...

138: FPGA + DDS-based control design
1 Introduction With the digital signal processing and the development of integrated circuits require increasingly higher data processing speed, based on the single-chip + DDS (Direct Digital Synthesis) frequency synthesis technology can not meet th...

139: FPGA embedded system development in the process of document design XBD
Programmable logic device with the continuous progress and development, FPGA embedded system is playing an increasingly important role, has begun to be widely used in communications, aerospace, medical, industrial and other fields. Xilinx as the wor...

140: FPGA-controlled multi-channel pulse delay system
In scientific research, communications and automatic control, the regular need for precise timing of the pulse signal used to generate test signals or controlling the timing. The basic method of pulse delay can be divided into the number of methods ...


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