FPGA-based digital TV Signal Generator Design and Implementation of
digital television signals are increasingly making digital television equipment by the majority of e-consumers, how to choose the ideal digital TV products, has become a consumer concern, evaluation, testing TV systems and equipment running quality status as a broadcasting The focus of attention of the television industry. The digital television signal generator can provide visual test image signals, intuitive, quick test methods, therefore, digital television signal generator become the electronic design of the hot research topic, he broadcast in the digital television program production, scientific research, production and as well as after-sales service plays an indispensable role. This paper designed an FPGA-based digital TV signal Generator ICs, the signal generator in a single-chip multi-configuration programs, for the various parts of the system features and performance of their selection of films do not count, and the use of FPGA internal storage resources to a variety of test signals generated images.
A digital television signal generator functions and principles of
1.1 System Function
Digital TV signal system's main task is to generate consistent SMPTE274M system standard 18 kinds of digital signal test images, YPbPr, RGB video output interface complies with the two kinds of ITU-R BT. 1120-2/GY/T157-2000 studio high-definition digital video signal interface standard. This system is the core of image signal encoding unit occurs FPGA, to single-chip multi-configuration 18 kinds of image signals can be easily configured and encryption. Human-computer interface controlled by a microcontroller, can quickly carry out the image switching and format conversion. In ordinary power access, the system must generate support SMPTE274M system standards in the 1080I 60 Hz, 1080I 50 Hz, 1080P 60 Hz, 1080P 50 Hz four kinds of standard format of 18 high-definition digital TV universal test image output signal and analog output signal, its standard of digital test signals occurring core platform based on FPGA. On this basis, the system provides a manual control function, which users can button, the above-mentioned four kinds of standards for 18 kinds of test Patterns to switch control. Taking into account the usefulness of the output signal, the output of analog test signals and digital test signals must be meet the appropriate interface standard. In order to meet the above constraints, the system functional design shown in Figure 1.
1.2 The principle of signal generation
Digital TV is also a color TV (only the signal representation and signal processing method and analog TV be different), so in considering the digital TV test signal generator, which contains (test signal) content, this according to the basic characteristics of color television, should first consider the general color television test pattern that contains the basic elements, such as observation of the display device scanning nonlinear distortion and geometric distortion of the board signals and a round signal observed image clarity and resolution of multi-wave group, or sweep signal, observe the non-linear distortion as well as display brightness white balance adjustment is correct gray-level (or step-wave) signal, to reproduce the observed color is the correct color bar signal, etc.; also consider increasing the number of the most commonly used in the video measurement of 2T pulse signal, color multi-wave group signal and color step-wave signal, and more intuitive ramp signals for the full observation and evaluation of color television systems or equipment, basic quality. Group of a multi-wave test signals, for example, he includes a brightness signal and color multi-wave group of multi-wave group signal, the signal at any instant the value of the available digital hardware in the number of representatives. For the brightness of multi-wave group signal, according to degree of 1125/50 high-definition television luminance signal sampling frequency (74.25 MHz), in order to avoid the phase transition, multi-wave group of test signals in each group should contain the entire sampling period, its frequency from left to right the Group sine wave frequency (fs) respectively take 4.125 MHz, 6.187 5 MHz, 7.425 MHz, 10.6 MHz, 14.85 MHz, 18.56 MHz; for color multi-wave group signal, according to digital television color signal sampling frequency (370 125 MHz ) requirements, the frequency of each group from left to right sine wave frequency (fs) respectively take 2.063 MHz, 3.094 MHz, 3.713 MHz, 5.3 MHz, 7.425 MHz, 9.28 MHz; each of 320 sampling points, the equation is :
2 digital TV signal generator FPGA Design
2.1 FPGA Design Principle
FPGA is a digital television test signal generator, the entire core of the system, all kinds of test signals encoded in this part of the implementation. This system is the XILINX's FPGA chosen Vertex-E Series XCV300E, development tools for the XILINX's ISE 6.0, all the test signals are used Vetilog hardware description code language programming. FPGA design principles shown in Figure 2. All tests are based on the signal encoding the image row / column coordinates arising from its row and column coordinates for the pixel coordinates of each line of the counter under the counter and count the rising edge of global clock values obtained. OK domain signal generation module of the line counter output value threshold division will test the image by row is divided into different regions, known as the line of the domain. Domains in different lines, according to the different pixel values of pixels counter regional division, will test the image further divided into relatively independent of signal coding regions, each corresponding to a flag signal. At this point, row / column coordinates-one correspondence with the signal coding region, saying that the current output signal where the row / column corresponding to the signal coding region for the current domain, and its signs and signals for the current domain signs and signals. Finally, based on the current domain signs and signals of the test signal timing reference code, effective area and so the signal is encoded by the test pattern image signal coding module output all the code value of digital video components.
2.2 FPGA design of the overall structure of
2.2.1 Image Signal Generation Unit
The module is the system's core, as shown in Figure 3, he produced XCV300E by XILINX composition is a single-chip multi-configuration in the main chip can provide support SMPTE274M 1080I 60 Hz/1080I 50 Hz format of 18 kinds of HDTV universal test chart, such as integrated test card signal, SMPTE219-2002 test pattern, SMPTE 198-1998 field inspection maps. The main control module according to the output of chip design / format of selection signals, select a different configuration program, the output test pattern corresponding figures Y, Cb / Cr value of letters numbers and the associated synchronization / blanking control signal.
2.2.2 image signal configuration and encryption unit
The module consists of eight configuration with a XC95144XL chip XCF02S composition of the successful achievement of single-chip multi-configuration of the key modules. Configuration program selection switch that is under the control module to connect the output of 5 b configured chip select signal, select the appropriate test pattern configuration of the system programmable PROM chip JTAG connection with the main chip, connected to the corresponding pin.
2.2.3 image signal output unit
Digital output in part by the drive circuitry and interface chips, analog output in part by TI company's D / A conversion chip THS8200 and its internal IFIR digital filter and the external op-amp circuit digital-analog conversion. Control module according to the pattern / format and the analog output interface type select signal, the Y, Cb / Cr component of the parallel digital video signals are converted to analog output, or converted to analog output RGC.
2.2.4 Man-Machine Interface and Control Unit
Control the analog signal output type, and through the output I2C-bus to the D / A conversion chip configuration registers accordingly. Based on external input signal, resulting in a corresponding pattern / format of choice to configure chip select signals and signals, control and configuration of the main chip-chip power-down and power-on timing, and selection of switching modules connected together to complete test pattern switching. This single-chip multi-configuration, signal conversion speed quickly, with the single-chip configuration, like the millisecond.
2.3 FPGA test image signal generator
Integrated Test image signal is actually synthesized by a variety of test signals, including circular signals, the board signals, multi-wave group signal, color bar signals. Design a comprehensive test plan is divided into three levels of achievement. First-layer design with a round signal as a strobe, round the signal outside the effective area of the video output board signal, and round the signal within the effective area of the video output of a variety of test signals; second-layer design with the counter value as the signal line of demarcation boundary value the different lines in different domains of the test signal output for a variety of test equipment performance; third layer design uses a pixel counter value as the signal within the zoning parameters, the completion of each test signal generation. Its code of basic block diagram of the design shown in Figure 4.
One round checkerboard signals outside the cell using duplex board white, round design of the signal sequence from top to bottom with white field, the signal, 2T pulse signal, black and white field mixed-signal, 100% color bar signal, brightness, multi-wave group of signals, 6 Step 5 signal brightness level, 2T pulse signal and color difference observed signal light delay. Mixed signal field in which black and white black and white alternating fields, each 80 pixels wide; color bars signal level in line with 100/0/100/0, each color signal width of 160 pixels; brightness multi-wave Each group of signal-wave-band signal width 160 pixels; 6 Step 5 signal brightness level of each step width 160 pixels; 2T pulse width for the demi value of 34 ns, the range of 80% of the video range 2T sine pulse flat Founder and negative pulse signal; under the yellow and red brightness level difference between the larger and easier to observe factors such as color, light time delay difference observed signal with yellow, red signal, its red and yellow at the junction with the above 2T pulse peak point in the test chart position of the horizontal direction is consistent. For the effective use of FPGA resources, and shorten the development cycle, integrated test plans in multi-wave group called ROM-direct signal IP core implementation.
FPGA-based digital TV signal generator small, easy to carry, can generate a comprehensive test pattern, SMPTE RP 219-2002 Color Bar test pattern and other complex signals can be a comprehensive assessment of digital TV systems or equipment, basic quality, especially suitable for use on television (digital program) prior to broadcast on the system or equipment testing evaluation and to receive, display devices to adjust, but also for other technical departments, as well as television digital TV equipment, production lines or in the maintenance department and other systems or equipment used for the adjustment and detection; selection, also can make use of video test instrument on the system or equipment for analog video index measurements, as a low-cost digital TV signal source has broad application prospects.
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