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A small, highly integrated intelligent design and realization of test device

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Safety Critical systems (Safety Critical Systems, SCS) is the system function if failure would cause a great loss of life and property, the environment may have been severely damaged system, in the aerospace, energy, defense and many other areas of widespread. Many safety-critical systems with multi-input - multiple-output strong coupling, parameters such as time-varying and nonlinear characteristics. The rapid development of electronic technology allows SCS electronic systems integration, complexity is ever growing, increasingly complex controlled object, which the security of the system, run the normal assessment and decision-making put forward higher requirements for certain even need to use the period key components of zero failures. SCS test data to its comprehensive, accurate, intelligent evaluation, fault diagnosis and decision-making. In addition, many safety-critical systems also have strict weight restrictions on the size require running on the embedded test its small size, light weight, fully functional at the same time must have a high reliability and intelligent in order to ensure the correctness of test improve the test's credibility. Therefore, SCS is a small and reliable detection of the most basic requirement, while the test data safe and reliable high-speed transmission is also a focus of one of the requirements.

This article describes a small highly integrated intelligent test device, a class of safety critical systems used in electronics equipment, integrated test systems. Its role is key to safety-critical systems in real-time status and parameters of control and measurement, to complete a large number of data acquisition and processing, as well as receiving and sending control signals and many other features. Because of the system operation speed, interface, resources, stability, and cost has a very high demand, so the test data, analysis curve shows the results of the analysis of the chart and instructions, to determine safety-critical system performance and an important basis for the work of the state, while for the relevant decision-making, command, control, provide the basis and means.

A system design and operation principle

1.1 System Components

Small highly integrated intelligent test installations 80C196 microcontroller + PSD + CPLD structure [1], coupled with an analog signal matching circuit to be completed by volume of analog and digital capture, allowing the system circuit designed to be simple; PSD and the CPLD are in the -system programmable devices, so that a large number of hardware design into software design, I / O port expansion easy. Host computer through standard interfaces to the test system the test data transmission and parameter binding and control. SCS electronics integrated test includes the key components of SCS testing, measurement and control on the ground outside its data transmission and processing. Its function block diagram shown in Figure 1.

A small, highly integrated intelligent design and realization of test device

1.2 The composition of small-scale intelligent measurement and control devices

Small intelligent measurement and control devices mainly include data acquisition module, a static test module, remote parameter binding module and data transmission modules. As the SCS on the Electronic Control Unit have strict size and weight requirements, monitoring and control device shall be in accordance with the requirements of the system design, makes the size, weight, small and functional as possible in order to ensure the feasibility of the system.

In the test fixture design process for a number of optimized and improved. The basic system of micro-controller, plus peripheral interface module structure. Data acquisition system in the design of the hardware, the use of highly integrated devices, including the 80C196 microcontroller, programmable peripheral devices PSD, and complex programmable logic arrays CPLD and so on, to improve system integration, and also to improve the system hardware reliability and flexibility.

Peripheral interface modules use complex programmable gate array CPLD-MAX7256 [4], and further software-based hardware design. A CPLD device replaces the 74 series of multi-chip devices, such as the 138 decoder, multi-switch, 244 drives, with the door, or doors, etc., greatly reduces the board size. As for the programmable CPLD to make the design more flexible. MAX7256 5,000 gates, 256 macrocells, 16 logic array blocks, 164 I / O ports, support for multi-voltage I / O interfaces, to meet the system requirements, and have a certain redundancy. At the design stage right through the CPLD design simulation eda tools, including functional, timing, EMC / EMI in simulation, before the completion of PCB board, they do a full test certification.

In addition, the use of a more integrated microcontroller peripheral interface device PSD4235 [2 ~ 5]. PSD4235 chip is WSI's new PSD4000 series of products for 16-bit and 32-bit micro-controller and dsp to provide concurrent in-system programmable flash memory, SRAM, programmable logic and additional I / O. Its on-chip integrates a 4M-bit flash memory, 256Kbit to guide data for the sub-flash memory, 256Kbit of SRAM, 16 output micro-unit, 24 input micro-units CPLD, decoding PLD, 52 which could be individually configured I / O ports, JTAG serial interfaces, and power-down mode that supports low-power programmable power management unit. PSD-chip external address allocation and the interface logic of decoding by a dedicated software PSDSoft Express implementation. PSD4000 series devices are programmable in the application (In application re-Programming, IAP), that is, they can not affect the system operation situation, in the field remotely re-programmed. This feature is needed in the field code / data update system is particularly useful, such as the Global Positioning System (GPS), vehicle control systems and medical instruments. Measuring and control device circuit diagram shown in Figure 2.

A small, highly integrated intelligent design and realization of test device

1.3 Signal Acquisition

In real-time measurement and control systems, signal acquisition requirements for reliable, accurate, rapid and complete. Be measured loop generally have dozens or hundreds, but many kinds of collecting the signal, including analog signals and digital signals, so testing should have a strong real-time, while data collection application of anti-jamming ability is very high demand. It is precisely because the data acquisition system requirements become more complex, intelligent small-scale safety-critical systems acquisition module became the core of measurement and control system.

SCS data test includes all key components of the voltage, the program action (delay time or switching volume), Sasser shape and burst tests. Designed to focus on reliability and real-time. The reliability of data collection is essential, and only with a high reliability, in order to ensure the accuracy of data collection, so designed to take full account of the testing process of the anti-jamming capability, improve the test's credibility. Data acquisition module structure shown in Figure 3.

A small, highly integrated intelligent design and realization of test device

Analog measurement using 80C196 microcontroller analog measurement interface. 80C196's A / D port a total of 8, need to use multi-channel switch turns all the tested circuit switching A / D conversion circuit, in order to achieve the purpose of time-sharing deal. Because the signal strength, amplitude, and impedance matching circuit is different, so the design was handled as follows:

(1) the voltage signal classification, does not require the amplifier belongs to a class, in such of them can be broken down - the voltage range of categories. Because the 80C196 Microcontroller required level collected in less than 5V, if every way voltage divider and the RC filter design, is bound to use a large number of resistors and capacitors parts, is not conducive to miniaturization, so be classified according to voltage amplitude. Impedance matching is also important, the same kind of resistance-capacitance filter network into multi-output switch and save a lot of resistors, capacitors pieces. According to need to select 4-way, 8-way or 16 way multi-way switch, such as the CD4051, CD5052, MAX396 or MAX397, etc..

(2) for small signals, each channel should be set up in a multi-way switch before the amplifier. After the switch is set in a multi-way programmable amplifier, microcontroller programming using the gain control amplifier in order to meet the different gain of each channel signal request.

(3) For the amount of switching capacity and the number transferred to meet the requirements of CPLD input level can be, in the CPLD interior design multi-switch, convert measurements into large ones, one 8-way time-input to the 80C196 microcontroller port.

(4) For the frequency signal, transferred to meet the requirements of microcontroller TTL input levels can be measured directly microcontroller port.

(5) For the signal strong and interference with large signals, the need for optical isolation, so as not to affect the single-chip circuitry.

1.4 CPLD circuit design

PSD has a small CPLD macrocell device, in the test system is not complicated, I / O ports enough for the case, PSD + CPU of the two systems could well fulfill its mandate, of course, no longer external CPLD devices. When the testing and control of external access and more need a large number of digital I / O port, chip select, digital multi-channel switch, tri-state gate and decoding circuit, only to add a CPLD device can solve problems, improve system integration .

FPGA and CPLD devices are programmable ASIC, FPGA and CPLD due to structural differences exist between the respective characteristics:

(1) CPLD appropriate for achieving a variety of computing and combinational logic, FPGA is applicable to realize sequential logic.

(2) CPLD time characteristics of stability than the FPGA. CPLD routing structure determines its timing delay is stable and predictable, while the FPGA's segmented routing structure makes forecasting difficult for its time delay and thus the speed of CPLD faster than the FPGA.

(3) programming the FPGA with greater flexibility than the CPLD. By modifying the internal CPLD has a fixed line of logic functions to be programmed while the FPGA is mainly by changing the internal circuit wiring to programming.

(4) FPGA integration higher than the CPLD, suitable for more complex wiring structure and logic to achieve, so the number of FPGA programmable logic devices is much greater than the CPLD.

(5) CPLD convenient to use than the FPGA. CPLD programming with E2PROM or Flash technology, and can be encrypted, no additional use of external storage devices; and FPGA programming using SRAM technology, the use of external storage devices to store the program, use the method more complex. In addition, the circuit information is stored in an external chip, making the confidentiality of FPGA worse than the CPLD, the circuit information easily read by others, the circuit easily be copied, not suitable for systems that require a higher level of confidentiality.

(6) in the programming the way, CPLD is mainly based on E2PROM or Flash

Memory programming, programmable frequency greater than 1 million times, the advantage of programming information when the system power will not disappear. Most of SRAM-based FPGA programming, programming information will disappear when the power failure in the system, so every time the system power must be re-programmed information from the external memory device read into the SRAM in the FPGA. The advantage is programmable number of times, and in the development process can be easily subject to change procedures, the drawback is when the system power-on procedure susceptible to interference.

Design of all these factors must be considered to determine the choice CPLD or FPGA. According to the test functional requirements, the system design of the internal structure of CPLD chip, as shown in Figure 4.

A small, highly integrated intelligent design and realization of test device

In the CPLD design using VHDL language as a primary design tool is currently the mainstream ASIC design methods. VHDL language related to the design process to achieve a highly efficient, convenient and easy-to-transplant characteristics, and simple lack of flexibility of the hardware circuit design, modify inconvenience, easily printed version obsolete. This hardware-based design software, making the measured object changes, or changes in the access point, the only part of the software for the appropriate circuit adaptation, the underlying hardware circuit and the upper application software are not required to make major changes may not even change, significant savings in system maintenance costs. In the CPLD design process, while the design, while software simulation on a computer to complete the work, making simulation tests and functional tests throughout the design of behavior has always been to ensure the accuracy and reliability of the various functions to ensure the quality of the final product design .

In the system design based on CPLD need to accomplish more functions, such as some functions of the 80C196 microcontroller with CPLD to complete, mainly to test the parts, including the serial interface, data encoding / validation, frame construction, from time to time to send with the external test computer data exchange. Through long-term accumulation, with a large number of reusable IP blocks, making the system more efficient development and design.

2 Intelligent and Reliable Design

Intelligent monitoring and control system information is mainly reflected in two aspects: One is to have the learning and memory function, can be based on information channels of the initial value or measured value automatically adjusts its control parameters; second is based on orders received by its channel number , channel number, acquisition time, transmission byte and the control methods to adjust.

This article describes the testing of small intelligent devices can not only test content on demand quickly adjusted, but also has a quiet location, binding parameters, to provide data. Its test data obtained through the RS-485 serial communication bus or wireless means to send to the external test receiver device. Since data transmission, test data package, which channel selection by the software to achieve, and therefore a high degree of intelligence, easy to use.

In the measurement and control data transmission process, for different tasks, using different message formats, to adopt different data processing procedures. External control system should be based on intelligence testing device with the SCS content of communications, construction communication protocols, data processing agreements, according to different categories of information (control command) to deal with different data, information packaged frame sent by the transmission module for processing.

Usually very strong electromagnetic interference testing ground for all these interfere with the form of conduction and radiation from power lines and signal lines into the system. In order to ensure reliable operation of the system to normal, using hardware and software combination of anti-jamming technology, the use of RC filter input channels, high-low embedded spaces, isolation technology, well inhibit a variety of high-frequency interference, and to achieve the overvoltage transient protection; part of the input and output signals using optical coupler, cut off the external signal and control systems; software used in the value and the arithmetic mean of a combination of measures to screen out the moment the signal interference, while software design using a variety of optimization tools to enhance the system robustness. In order to prevent the circuit because of public resistance caused by the signal cross-coupling, the system uses parallel single-point grounding design, the system analog ground and digital ground separately, only the point on convergence.

3 Test Device Software Design

The preparation of monitoring and control software uses PL/M196 languages [3], compiled with debugging WAVE6000 completed. Software flow chart in Figure 5.

A small, highly integrated intelligent design and realization of test device

Monitoring and control software mainly consists of two branches: the branch signal testing and parameter binding branch. Branch of its work is based on the ground to determine the way provided by testing whether the voltage signal. Binding parameters of voltage is greater than the given value, the system branches into the parameters of binding, single-chip waiting to receive binding data, to determine the accuracy of data, and classification of all data stored through the I2C interface to the shared several pieces of Flash ROM. If no binding voltage, then the testing branch, Microcontroller separate ways to start testing signals, and test data package framing, while the CRC checksum calculation of all data sent to the receiving device, and test data and determined that the system workflow. Because a larger amount of data, need to test the signal into large ones, type more, needs to be packaged to send the data frame length over 70 bytes per 10ms to 115.2k baud rate to send, except for measurement, control and framing time, data transmission time is necessary to carefully calculate. Use of inquiries and a standard interrupt mode, 10ms is not enough time, and through the oscilloscope measurement, a data transfer test increases the need 70ms. The system uses the PTS (Peripheral things server) interrupt mode, hardware interrupt from the micro-processor control code, taking up very little CPU time, similar to PC-DMA, do not modify the stack and save the Program Status Word. The system uses the PTS block transfer mode, only a given PTS control word, data block starting address and data length, define interrupt mask register, the last open standards PTS interrupt and interrupt, so that a data transfer test increases the need 6.5ms.

Tested and experimental results show that using SCM, PSD, CPLD and voltage conditioning circuit design is completed and other major components of SCS-related information acquisition and control is not only feasible and efficient, but also makes the SCS test device miniaturization, intelligence, improve the test system the reliability of one of the ways effective. SCM and programmable logic devices are highly complementary. SCM has a high cost performance, functional flexibility, ease of man-machine dialogue, good characteristics of the data processing capabilities, CPLD, and PSD are programmable devices such as high-speed, high reliability and the development of convenient, standardized, easy to maintain and so on. This microcontroller plus external circuit configuration of programmable devices in a number of high-performance instrumentation and electronics products have wide application prospects.


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