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Based on single-chip low-power active RFID tag design

Print View , by: iSee ,Total views: 23 ,Word Count: 1785 ,Date: Sat, 22 Aug 2009 Time: 10:02 AM


Radio Frequency Identification (RFID) technology at home and abroad in recent years has been developing rapidly. The need for battery-powered portable systems, power consumption is also increasing attention. This article will detail MSP430F2012 and CC1100-based low-power design of two-way active implementation of software and hardware labels.

Low-power design

An overview of low-power

Basic definition of power as the rate of energy consumption can be divided into transient two types of power and average power consumption. Significance between the two different applications have different background and optimize the strategy, is often summed up as generally low-power design. Empirical study can be divided into light of different circumstances:

(1) transient power optimization: the goal is to reduce peak power consumption to address the issue of circuit reliability.

(2) the average power optimization: the goal is to reduce a given period of time the energy consumption, mainly for battery-powered portable electronic devices to extend battery life or reduce the weight of equipment.

Physical source of power

Circuit chip power consumption, mainly from two aspects: the dynamic power and static power consumption. Dynamic power consumption is mainly capacitive charge and discharge and short circuit current. Static power consumption is leakage current, including the PN junction reverse current and sub-threshold current, as well as the current penetration. If the timing and design of software algorithms are flawed, would reduce the system efficiency, extend working hours, will directly increase the system energy consumption.

Low-power design strategies

Algorithm-level power optimization: In the beginning of circuit design, it is necessary to carry out the choice of algorithm, it should be possible to choose power efficient algorithms. First of all, the logic required to achieve the size of algorithm, the algorithm in the number of operations, the need for bandwidth, storage, operations, port operations the less, this algorithm is applied to the lower power consumption of the circuit. The design of the actual need in accordance with the requirements of the application of the overall balance of performance and power consumption. At the same time, algorithms to deal with the needs of the Association must take into account, the algorithm required the Association to deal with the simpler, less collaboration module, needed to achieve the algorithm less power consumption. In addition, the algorithm less temporary variable, temporary variable effective short, the rational use of the cycle will be required to reduce power consumption algorithm.

System-level power design and management: system-level dynamic power management is power management. Usual practice is at idle when in sleep mode operation, only part of the equipment at work; when a failure to wake up from the interruption of other equipment. In fact, this part of the need for hardware support, such as: power system low-power technology; system into hardware and software, is to decide which functional modules from the software to achieve a smaller power consumption, and which function modules from the hardware to achieve a smaller power ; low-power processor choice.

System hardware design

Considering the source of system power consumption and low-power design strategy, the selection of hardware design features low-power microcontroller and rf transceiver chips, and to simplify the circuit to reduce power consumption expenditure.

The choice of the main chip

MSP430 mcu to complete the structure of the system as its core low-power operation, power use of 1.8 ~ 3.6V low-voltage, power consumption Patterns of activity 250μA/MIPS, RAM data retention mode power consumption is only 0.1μA. As the system in more than 90% of the time are in a dormant or low-power state, so the impact of leakage power consumption of the system has become another important factor, the I / O port input leakage current maximum of only 50nA. Coupled with a unique design of the clock system, including the two different clock system: Basic clock system and the frequency-locking loop (FLL and FLL +) clock system or the number of DCO oscillator clock system. CPU by the clock system and the functional modules required for the clock, and the clock can be under the control of the command to turn on or off in order to achieve control of the overall power consumption. As the system used by different modules, namely, the work of a different mode, the chip power consumption will be significant differences. In the system a total of an activity model (AM) and five low-power mode (LPM0 ~ LPM4). In addition, MSP430 MCU interrupt vector used to support more than 10 interrupt sources, and can be nested. Interrupt request by the CPU only needs to wake up 6μs, through the rational programming, not only can reduce system power consumption, and can respond quickly to external requests.

Radio frequency card RFID chip is the core part of the most directly related to the tag read and write distance and reliability, but also directly affects the power consumption of the entire system. Chipcon Introduces CC1100 is a single-chip UHF wireless transmitter, small size, low power consumption, data rate of 1.2 ~ 500kbps in support of the programmable control, the operating voltage range of 1.9 ~ 3.6V, can work in 915MHz., 868MHz. , 433MHz and 315MHz band 4 can be configured through the procedures provided in all frequency bands -30 ~ 10dBm output power with built-address decoder FIFO stack area, modem processor, the processor clock, GFSK filter, low-noise amplifier , frequency synthesizer, power amplifier and other functional modules. It has two low-power mode: shut down mode and idle mode, in the shutdown mode current of less than 200nA. In this article work in the CC1100 frequency of 433MHz, using FSK modulation, data rate of 100kbps, for channel spacing of 200kHz.

Circuit Design

To simplify the system structure, the system only need to microprocessor unit, RF transceiver module, antenna and battery modules. Save the battery to the regulator circuit between devices, directly from the battery power supply to the system. Savings brought about by the regulator circuit of the quiescent current consumption, so that further extend battery life. In order to prevent the launch of the current state of the larger transient voltage caused by battery to reduce the use of large capacitor in parallel with the battery. MSP430F2012 integrated zero-power internal under-voltage reset (BOR) protection, voltage can be lower than the safe operation of the scope of the implementation of fully reset, a good single-chip solution to the incomplete reduction of random error arising from operational problems.

Software Design

As far as possible to replace the hardware with software, low-power system design is also often taken. The developers have considered the efficiency of scheduling and timing of both issues in order to reduce system power consumption.

Design work for a reasonable time-series

As a result of the operation of CPU time on a great impact on system power consumption should be as short as possible their working hours, longer in idle mode or power-down is software designed to reduce power consumption single-chip microcomputer system of the key. Program flow chart in Figure 2 (a), (b) below, when the system to complete the initialization of power instantly into the low-power mode, the system only to receive the right information to generate an interrupt to wake up when entering the single-chip mode, as far as possible in a short period of time to complete the information or data processing, when dealing with the end of an immediate return to low power mode waiting for the arrival of the next interruption.

Improve efficiency

With macro definitions to replace the subroutine call. Because the CPU into the subroutine, we will first of all, the current CPU registers into the stack (RAM), the left will pop-up CPU register stack, so bring at least two of the operation of RAM, so RAM than Reading Reading with flash to a greater power. With macro definitions to replace the subroutine call, it will undoubtedly reduce system power consumption.

Minimize the amount of CPU computing, computing the results of some pre-calculation, and on the Flash, the use of look-up table method for calculating real-time alternative to reduce the CPU workload of the operator can effectively lower the CPU's power consumption; inevitable real-time calculation, the accuracy enough to end; to make full use of short data types: such as to make full use of the 8-bit character data to replace the integer 16-bit data, as far as possible to avoid the use of scores of floating-point operations and so on.

Let I / O module intermittent operation, not the I / O module or intermittent use of the I / O module to switch off in time to save energy. Do not have the I / O pin to set to set to output or input, use pull-up resistor pulled. If the pin is not initialized SCM may increase leakage current.


This paper describes the MSP430 microcontroller-based low-power active RFID tag design, rational use of the MSP430 microcontroller interrupt, timing, calculation and other functions, through software, the advantages of lower power consumption module CC1100 limited to measures taken to improve the battery life, reliable operation of the system to increase the time, power consumption compared with other designs as shown in Figure 3. This active RFID tags designed to RFID to improve the performance, which to a large extent solved the long-distance, high-volume, anti-interference, high-speed mobile identification marker of the problem. The design is completed with the support of the RFID tag reader can identify the composition or article positioning system, widely used in mining, industrial production, road transport, logistics, transportation, medical care, medicine, and many other areas of national security.

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